1. Field of the Invention
The present invention relates to an output circuit.
2. Description of the Related Art
In electronic circuits, half-bridge circuits and H-bridge circuits (which will be referred to as the “bridge output circuits” hereafter), which employ power transistors, are widely employed. The bridge output circuit includes a high-side transistor and a low-side transistor arranged in series between the power supply terminal and the ground terminal. By alternately switching on and off the high-side transistor and the low-side transistor, such an arrangement outputs either the power supply voltage or the ground voltage via a connection node that connects these two transistors.
With such a bridge output circuit, if the high-side transistor and the low-side transistor are switched on at the same time, shoot-through current flows from the power supply terminal to the ground terminal. In order to prevent such a shoot-through current, a period is established in which both the high-side transistor and the low-side transistor are turned off (which will also be referred to as “dead time”) between a state in which the high-side transistor is to be turned on and a state in which the low-side transistor is to be turned on.
By increasing the dead time, such an arrangement reduces the risk of a situation in which the high-side transistor and the low-side transistor are turned on at the same time. However, such an arrangement has a problem of reduced energy efficiency. Furthermore, such increased dead time leads to a problem of the bridge circuit having a reduced response speed, i.e., a problem of reduced switching speed.